Design Verification Engineer
DIGITAL ELECTRONICS
Are you fascinated by the inner workings of electronic devices, from smartphones to computers, & eager to know the digital world?
VERILOG
Dive into practical Verilog projects, from simple LED blinkers to complex FPGA-based applications.
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SYSTEM VERILOG
System Verilog is a high-level hardware description language (HDL) used for the design and verification of digital systems.
UVM
Explore our range of UVM courses, including introductory courses for beginners, advanced topics for experienced engineers, and specialized UVM applications.
LINUX & GVIM
Are you ready to dive into the world of open-source computing and take your text editing skills to the next level?
PROTOCOLS
Our detailed articles and tutorials break down various protocols, from the foundational TCP/IP to application-specific ones like AXI, PCIe, Ethernet, and more
Verilog Series · Module 07
Gate Level Modelling in Verilog — VLSI Trainers Verilog Series · Module 07 Gate Level Modelling...
Verilog Series · Module 08
Gate Level — Arrays, Flip-Flops, Delays, Strengths, Nets — VLSI Trainers Verilog Series · Module 08...
VERILOG SERIES · MODULE 09
Modelling at Data Flow Level — VLSI Trainers Verilog Series · Module 09 Modelling at Data...
VERILOG SERIES · MODULE 10
Behavioral Modelling in Verilog — VLSI Trainers Verilog Series · Module 10 Behavioral Modelling in Verilog...
VERILOG SERIES · MODULE 11
Behavioral Modelling Part 2 — VLSI Trainers Verilog Series · Module 11 Behavioral Modelling — Part...
VERILOG SERIES · MODULE 12
Behavioral Modelling Part 3 — if, assign-deassign, repeat, for, disable — VLSI Trainers Verilog Series ·...
VERILOG SERIES · MODULE 13
Behavioral Modelling Part 4 — While, Forever, Parallel, Force-Release, Events — VLSI Trainers Verilog Series ·...
VERILOG SERIES · MODULE 14
Switch Level Modelling — VLSI Trainers Verilog Series · Module 14 Switch Level Modelling The lowest...
VERILOG SERIES · MODULE 15
Switch Level — Delays, Strengths & Trireg — VLSI Trainers Verilog Series · Module 15 Switch...