June 2026

PCIe Physical Layer Explained — Lanes, Differential Signalling and Electricals

PCIe Series — PCIe-14: Physical Layer — Lanes, Differential Signalling & Electrical — VLSI Trainers PCIe Series · PCIe-14 Physical Layer — Lanes, Differential Signalling & Electrical What a PCIe lane actually is at the wire level — one differential pair in each direction, AC coupling, differential and common-mode voltage, characteristic impedance, why differential signalling […]

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PCIe Flow Control Explained | Credits, Tags & Credit Return

PCIe Series — PCIe-13: Flow Control — VLSI Trainers PCIe Series · PCIe-13 Flow Control How PCIe prevents a fast transmitter from overwhelming a slow receiver — the six credit types (PH, PD, NPH, NPD, CPLH, CPLD), credit unit sizes, FC DLLP format, the two-phase FC_INIT handshake, infinite credits and why completions need them, UpdateFC

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