Up until now, we have explored how packets are built and how flow control prevents congestion. But what happens when certain data packets are simply more important than others? In Lecture 12, we are introducing Quality of Service (QoS) and Differentiated Services.
The Need for QoS
Many general-purpose computer systems historically lacked mechanisms to manage bandwidth for peripheral traffic. However, modern applications demand it. For example, streaming high-definition video across a general-purpose data bus or running an embedded guidance control system requires data to be delivered at exactly the right time.
To accommodate these strict requirements, the PCIe specification includes Quality of Service (QoS) mechanisms designed to give preference to critical traffic flows.
What are Differentiated Services?
The broader term for this QoS capability is Differentiated Service. This concept means that packets are treated differently by the system based on an assigned priority, allowing the PCIe fabric to support a wide range of service preferences. By prioritizing traffic, a system ensures that critical data streams are not starved for bandwidth by mundane background tasks.
The Gold Standard: Isochronous Service
At the highest end of the Differentiated Service range, QoS can provide predictable and guaranteed performance for applications that absolutely rely on it. This elite level of support is called “isochronous” service.
The term is derived from the Greek words “isos” (equal) and “chronos” (time), which together describe something that occurs at equal time intervals. If a video camera needs to guarantee the delivery of a specific amount of data every few microseconds without fail, it requires an isochronous connection.
Hardware and Software Requirements
Making isochronous service and QoS work in a PCIe topology requires a tightly coordinated effort between both hardware and software. Supporting these high levels of service places strict requirements on system performance:
- High Transmission Rate: The Link must be fast enough to deliver sufficient data within the application’s required time frame, even while accommodating competition from other traffic flows.
- Low Latency: The system latency must be low enough to ensure the timely arrival of packets and completely avoid delay problems.
- Managed Error Handling: Standard error handling mechanisms must be carefully managed so that retries do not interfere with the strict, timely delivery requirements of isochronous packets.
To achieve these goals, PCIe devices must implement specific hardware elements, notably a set of configuration registers known as the Virtual Channel Capability Block.