Design Verification Engineer
DIGITAL ELECTRONICS
Are you fascinated by the inner workings of electronic devices, from smartphones to computers, & eager to know the digital world?
VERILOG
Dive into practical Verilog projects, from simple LED blinkers to complex FPGA-based applications.
.
.
SYSTEM VERILOG
System Verilog is a high-level hardware description language (HDL) used for the design and verification of digital systems.
UVM
Explore our range of UVM courses, including introductory courses for beginners, advanced topics for experienced engineers, and specialized UVM applications.
LINUX & GVIM
Are you ready to dive into the world of open-source computing and take your text editing skills to the next level?
PROTOCOLS
Our detailed articles and tutorials break down various protocols, from the foundational TCP/IP to application-specific ones like AXI, PCIe, Ethernet, and more
HOME: Verilog
Introduction to Verilog HDL Verilog Docs Verilog Docs Hardware Description Language Course Index Introduction Lexical Conventions...
PCIE simulator
PCIe TLP Design & Verification Explorer P PCIe RTL & Sim Explorer Design Specs Run Simulation...
Digital Electronics : Revision
Digital Electronics Interactive Study Hub DigiElec Study Syllabus Index Quiz Exam Prep Flashcards Digital Electronics Index...
P1: The Evolution of Peripheral Buses: From ISA to High-Performance PCI
In the early 1990s, the peripheral standard for personal computers was IBM’s AT bus, widely known...
P2. Understanding PCI Basics: The Shared Parallel Bus and Bus Cycles
As we explored in our previous module on the evolution of peripheral buses, the PCI bus...
P3. PCI Transaction Models: Programmed I/O, DMA, and Peer-to-Peer
In our previous lectures, we discussed the hardware foundations and bus cycles of the PCI standard....
P4. The Limitations of Parallel Buses: Why PCI Hit a Speed Ceiling
In our previous lectures, we explored the foundations of the PCI bus and how it revolutionized...
P5. Introducing PCI-X: Achieving Higher Bandwidth and the Split-Transaction Model
As we saw in the previous lecture, the traditional parallel PCI bus eventually hit a physical...
P1.1 The Shift to Serial Transport: Understanding PCIe’s Dual-Simplex Architecture
As we learned in previous modules, the legacy parallel PCI and PCI-X buses eventually hit physical...