PCIe Series — You Made It — A Look Back at Everything — VLSI Trainers PCIe Series · Complete You Made It 🎉 A look back at every major concept, mechanism, and skill built across the full 30-post PCIe series — from the first differential pair to 64 GT/s PAM4, from a Vendor ID probe […]
Learn how PCIe 5.0 and PCIe 6.0 evolved with 32 GT/s speeds, PAM4 signalling, Forward Error Correction (FEC), and flit-based framing. Understand bandwidth scaling, latency trade-offs, and protocol architecture changes in modern PCIe generations.
PCIe 5.0 & 6.0 Explained: PAM4, FEC, Flit Mode and Bandwidth Evolution Read More »
Test your number system skills with an interactive conversion challenge covering Decimal, Binary, Octal, Hex, BCD, Gray code and Excess-3 conversions in digital electronics.
Number Systems Quiz — Test Your Digital Electronics Skills Read More »
PCIe Series — PCIe-29: DMA and IOMMU — VLSI Trainers PCIe Series · PCIe-29 DMA and IOMMU How PCIe devices initiate Direct Memory Access, why unrestricted DMA is a critical security and reliability risk, how the IOMMU translates device-visible IOVA addresses to physical memory, the structure of IOMMU remapping tables, ATS-based translation caching, and how
PCIe Series — PCIe-28: SR-IOV — Single Root I/O Virtualisation — VLSI Trainers PCIe Series · PCIe-28 SR-IOV — Single Root I/O Virtualisation How one physical PCIe device appears as hundreds of separate devices to virtual machines — Physical Functions vs Virtual Functions, the SR-IOV Extended Capability register set, VF BARs, the VF Offset and
PCIe SR-IOV Explained — Single Root I/O Virtualization Read More »
Learn PCIe Advanced Error Reporting (AER) in detail. Understand correctable and uncorrectable errors, fatal vs non-fatal errors, error masks, ECRC, error forwarding, logging, and the AER capability structure.
Learn PCIe Device Power States in detail. Understand D0, D1, D2, D3hot, D3cold, context retention, PME (Power Management Events), wake signaling, and PCIe device power management behavior.
Learn PCIe Power Management in detail. Understand ASPM, PCIe link states L0, L0s, L1, L1.1, L1.2, L2/L3, entry and exit latency, hardware vs software control, and ASPM policy.
PCIe Power Management Explained — ASPM and Link States Read More »
Practice 120 number system conversion problems — Decimal, Binary, Octal, Hex, BCD, Gray code, Excess-3 and mixed conversions with hints and full step-by-step solutions.
Master Number System Conversions with 120 Questions Read More »
Learn number system conversions step by step — Decimal, Binary, Octal, Hexadecimal, BCD, Gray code and Excess-3 with worked examples, methods, and practice problems for digital electronics.
Digital Electronics Number System Conversion Guide Read More »
