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MODULE

MODULE        Any Verilog program begins with a keyword – called a “module.” A module is the name given to any system considering it as a black box with input and output terminals as shown in Fig.5. The terminals of the module are referred to as ‘ports’. The ports attached to a module

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UNIT V(Part II)

TYPES OF PROGRAMMABLE LOGIC DEVICES (PLD): Programmable Arrays OR Array AND Array Classifications of Simple Programmable Logic Devices (SPLD) Read-Only Memory (ROM) Programmable Array Logic (PAL) Programmable Logic Array (PLA) Programmable Logic Sequencer (PLS) More complex FPGA (Field Programmable Gate Arrays) CPLD (Complex Programmable Logic Devices) Classifications of Simple Programmable Logic Devices (SPLD) Read Only

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Digital electronics : UNIT V

UNIT VLOGICAL FAMILIES AND PROGRAMMABLE LOGIC DEVICES (Pending – Pre MCQ) THEORY Introduction  Logic families represent kind of digital circuit/methodologies for logic expression  Integration levels:  SSI: Small scale integration 12 gates/chip MSI: Medium scale integration 100 gates/chip  LSI: Large scale integration 1K gates/chip  VLSI: Very large scale integration 10K gates/chip ULSI: Ultra large scale integration

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