Now that we understand how packets are built and routed, it is time to explore how PCI Express meticulously manages traffic. In Lecture 7, we are exploring Flow Control Concepts and how PCIe prevents traffic jams on the Link.
The Problem with Legacy Buses
In older parallel bus architectures like PCI, transactions were attempted blindly, without the transmitter knowing if the target device actually had the space to handle the data. If the receiver lacked sufficient buffer space, the request was rejected and the transaction had to be repeatedly retried until it completed. This “Delayed Transaction Model” suffered from extremely poor efficiency due to constant disconnects, retries, and wait-states.
The PCIe Solution: Credit-Based Flow Control
PCI Express solves this issue by implementing a strict credit-based flow control mechanism at both ends of every Link.
The golden rule of PCIe flow control is simple: transmitters never send Transaction Layer Packets (TLPs) that a receiver cannot accept. This perfectly prevents receive buffer over-runs and completely eliminates the need for legacy inefficiencies.
Here is how the credit system works:
- Initialization: Buffer space is quantified in units called Flow Control credits. During initialization, each receiver explicitly “advertises” the size of its buffers to the transmitter on the opposite end of the Link.
- Runtime Updates: During normal operation, the receiver regularly updates its neighbor about how many credits are currently available. It does this by sending specific Link maintenance packets called Flow Control Data Link Layer Packets (DLLPs).
- Low Overhead: To ensure these continuous updates do not drag down system performance, Flow Control DLLPs are kept extremely small, always consisting of exactly 8 symbols.
A Shared Responsibility
Executing flow control requires seamless teamwork between two of the PCIe protocol layers:
- The Transaction Layer contains the physical Flow Control buffers and the hardware counters that track the credits.
- The Data Link Layer is responsible for continuously sending and receiving the DLLPs that carry the credit updates back and forth.
Because of this coordination, before a transmitter can send a TLP, it checks its Flow Control Counters. If sufficient credits are available, the packet is forwarded to the Data Link Layer. If the receiver does not have the room, the transaction is blocked and held until a new Flow Control DLLP arrives showing available space.
Multiplying Efficiency with Virtual Channels (VCs)
Flow control mechanisms can vastly improve overall transmission efficiency if multiple Virtual Channels (VCs) are utilized.
PCIe supports up to 8 independent Virtual Channels (VC0 through VC7). Because flow control buffers are maintained separately for each individual VC, the channels operate independently. This means that a full Flow Control buffer causing a block in one VC will absolutely not block access to other VC buffers.