In our previous lectures on PCI Express (PCIe) configuration, we learned that only the Root Complex is permitted to originate Configuration Requests. This strict rule prevents chaos by ensuring the system processor maintains absolute control over configuring devices and assigning resources.
But once the Root Complex generates a Configuration Request, how does that packet successfully navigate the complex branches of switches and bridges to find its specific target? The answer lies in ID Routing and the critical distinction between Type 0 and Type 1 Configuration Requests.
Here is a breakdown of how these two request types work together to route configuration traffic through the PCIe topology.
The Role of Bridges: Secondary and Subordinate Buses
To understand how requests are routed, we first must look at the PCIe Switches and Bridges that connect the topology together. Every Bridge (including every Switch port) implements specific registers to keep track of the bus numbers located beneath it.
- Secondary Bus Number: The bus immediately beneath (downstream of) the bridge.
- Subordinate Bus Number: The highest bus number that exists anywhere downstream of that bridge.
When a Configuration Request arrives at a Bridge, the Bridge looks at the target Bus Number inside the packet’s header and compares it to its own Secondary and Subordinate Bus Number registers. How the Bridge handles the packet depends entirely on whether it is a Type 0 or a Type 1 request.
Type 1 Requests: Passing it Down the Chain
If the Root Complex needs to configure a device located deep within the PCIe tree, it generates a Type 1 Configuration Request. A Type 1 request acts as a transit pass; it indicates that the packet is simply traveling through the current bus and is destined for a completely different bus further downstream.
Here is how the system handles a Type 1 request:
- Endpoints Ignore Them: Because Type 1 requests are strictly intended for subordinate buses, non-bridge devices (Native Endpoints and Legacy Endpoints) know to completely ignore them.
- Bridges Forward Them: When a Bridge sees a Type 1 request, it checks if the target Bus Number falls between its Secondary and Subordinate Bus Numbers. If the target bus is within this downstream range, the Bridge accepts the packet and safely forwards it down to its secondary bus.
The Conversion: From Type 1 to Type 0
As the Type 1 packet gets forwarded down the branches of the PCIe tree, it eventually reaches the specific Bridge that connects directly to the target bus.
When this final Bridge examines the packet, it realizes that the target Bus Number exactly matches its own Secondary Bus Number. At this exact moment, a transformation occurs. Before placing the packet onto the local secondary bus, the Bridge converts the Type 1 Configuration Request into a Type 0 Configuration Request.
Type 0 Requests: Targeting Local Devices
A Type 0 Configuration Request is a localized announcement. When a packet takes the form of a Type 0 request, it tells every device on that specific bus: “The target is located on this immediate bus”.
Here is how a Type 0 request reaches its final destination:
- Checking the Device: Once the packet is placed on the bus as a Type 0 request, the devices attached to that bus evaluate it. They check the Device Number in the packet header to see which specific physical device is being targeted. (Note: On external point-to-point PCIe Links, the Endpoint is always designated as Device 0).
- Checking the Function: Once the correct device claims the packet, it checks the Function Number in the header to select the specific logic block (Function) targeted inside the device.
- Accessing the Register: Finally, the targeted Function uses the Register Number to access the exact Doubleword within its configuration space and executes the read or write command.
In summary, Type 1 requests act as the navigation mechanism, allowing configuration packets to safely pass through intermediate Bridges and Switches. Type 0 requests are the final delivery mechanism, strictly targeting local Endpoints and Functions on their immediate bus.