VLSI TRAINERS

import React, { useState } from ‘react’; import { Cpu, Terminal, Code2, Binary, Network, ChevronRight, Menu, X, BookOpen, LayoutGrid, Zap, ArrowRight } from ‘lucide-react’; const HomePage = () => { const [isMenuOpen, setIsMenuOpen] = useState(false); const categories = [ { title: “Digital Electronics”, icon: }, { title: “Verilog”, icon: }, { title: “System Verilog”, icon: }, { title: “UVM”, icon: }, { title: “Linux & Gvim”, icon: }, { title: “Protocols”, icon: } ]; return (
{/* Minimal Nav */} {/* Hero Section */}
Experimental Learning

Your VLSI Journey
Starts Here

Master Digital Verification, Physical Design, and DFT with our structured roadmap for the next generation of hardware engineers.

{/* Grid Menu */}
{categories.map((cat, i) => (
{cat.icon}

{cat.title}

))}
{/* Recent Activity (Compact) */}

Recent Insights

View All
{[ “CPU Architecture Evolution: A Deep Dive”, “PCIe Protocol Fundamentals for DV Engineers”, “How to get started with Verilog and FPGAs” ].map((title, i) => ( {title} ))}
{/* Minimal Footer */}
); }; export default HomePage;
Scroll to Top