(Structure, Interrupts, Power Management, Error Reporting & Vendor Messages)
- (Structure, Interrupts, Power Management, Error Reporting & Vendor Messages)
- 1. Introduction
- 2. Why Message TLPs Exist
- 3. Message TLP Structure
- 4. Message Routing Models
- 5. Common Message Types
- 6. Interrupt Messages
- 7. Power Management Messages
- 8. Error Reporting Messages
- 9. Locked Transaction Messages
- 10. Slot and Hot-Plug Messages
- 11. Vendor-Defined Messages (VDM)
- 12. Message Routing Example
- 13. Hardware Implementation Notes
- 14. Debug Tip
- NOTES
1. Introduction
Besides Memory, I/O, and Configuration transactions, PCI Express uses Message TLPs for control and event signaling.
These packets travel through the same link as data but carry no memory address — instead, their Type field defines the message purpose.
Message TLPs enable PCIe to remain pin-efficient and fully serial, removing the need for sideband signals used in parallel PCI (like INTA# or PME#).
2. Why Message TLPs Exist
Traditional PCI used dedicated lines for:
- Interrupts (INTA# – INTD#)
- Power management (PME#)
- Hot plug events
- Errors (SERR#, PERR#)
PCI Express eliminates all those wires by encapsulating these events into Message packets that are:
- Posted (no completion)
- Routed logically through the PCIe fabric
- Typed to indicate their purpose
💡 A Message TLP is, in essence, a control telegram sent across the PCIe network.
3. Message TLP Structure
All Message TLPs share a common base header:
| Field | Description |
| Fmt | 3DW / 4DW Header (with or without Data) |
| Type | Indicates message category (Message or Message with Data) |
| Message Code | Identifies specific message subtype |
| Traffic Class, Attr, TD, EP | Standard TLP control bits |
| Requester ID | Identifies message origin |
| Message Data (optional) | Optional payload (e.g., MSI data, vendor info) |
There are two general forms:
- Message (Fmt = 00) – Header only
- Message with Data (Fmt = 10) – Header + data payload
4. Message Routing Models
The routing method depends on the message type:
| Routing Type | Description | Example |
| Implicit | Routing based on message type (no address) | Power Management, INTx |
| Addressed | Contains a routing address | Vendor-defined messages |
| ID-based | Targeted to a specific Requester ID | Function-specific control |
| Broadcast | Sent to all devices in the hierarchy | PME Turn Off, Hot-Plug Events |
Routers and switches determine the next hop based on the routing field in the header.
5. Common Message Types
| Message Category | Example | Description |
| Interrupts | INTx, MSI, MSI-X | Replacement for legacy interrupt pins |
| Power Management | PME, PME Turn Off | Used for device power-state transitions |
| Error Signaling | ERR_COR, ERR_NONFATAL, ERR_FATAL | Convey AER (Advanced Error Reporting) events |
| Hot-Plug / Slot Control | Attention Button, Slot Power Limit | Used by root ports and bridges |
| Vendor-Defined Messages | Type 0 & Type 1 | Proprietary or custom communication |
6. Interrupt Messages
(a) INTx Messages
Emulate legacy PCI interrupts (INTA – INTD):
- Generated by legacy devices behind PCIe-to-PCI bridges.
- Implicitly routed to the root complex.
- Posted TLPs — no completion expected.
(b) MSI / MSI-X Messages
Modern PCIe devices prefer Message Signaled Interrupts:
- Message TLPs of type Message with Data.
- Data field contains the interrupt vector and control bits.
- Routed directly to the CPU’s interrupt controller via the root complex.
- Supports multiple vectors per device (> 200 interrupts possible).
🧠 Key Advantage: No dedicated interrupt lines — lower latency, higher scalability.
7. Power Management Messages
Two key message types manage device power:
| Message | Purpose |
| PME (Power Management Event) | Device signals it needs service to wake up (e.g., wake-on-LAN) |
| PME Turn Off | Request from root complex to transition device to low-power state |
Both are implicit routed messages.
Devices respond with a PME To Ack message if supported.
8. Error Reporting Messages
Error messages support Advanced Error Reporting (AER) and maintain reliability across the link.
| Message | Description |
| ERR_COR | Correctable error notification (link retrain, CRC error recovered) |
| ERR_NONFATAL | Non-fatal error; device can continue operation |
| ERR_FATAL | Fatal error; device may reset link or request recovery |
🔍 These are Posted, Implicitly-routed messages — they notify but do not expect responses.
9. Locked Transaction Messages
Used in legacy synchronization cases where transactions must be executed atomically across multiple devices.
The Locked Transaction message reserves bus ownership temporarily.
However, this mechanism is deprecated in newer PCIe versions, replaced by software-level synchronization or Atomics.
10. Slot and Hot-Plug Messages
Hot-plug capable systems use messages for mechanical and power events:
| Message | Description |
| Attention Button Pressed | User requests device eject |
| Power Fault Detected | Slot power failure |
| Slot Power Limit Change | Notification of allowed slot power increase/decrease |
These messages originate from Root Ports or Downstream Ports and help system firmware coordinate power and enumeration changes.
11. Vendor-Defined Messages (VDM)
(a) Type 0 VDM
- Used within the same hierarchy (Endpoint ↔ Root Complex).
- Can contain custom control data.
(b) Type 1 VDM
- Used through switches or across hierarchies.
- Routed based on ID or Address fields.
VDMs are powerful for OEM-specific functions — debug, telemetry, firmware update, and sideband communication.
However, both sender and receiver must negotiate capability through configuration space to avoid conflicts.
12. Message Routing Example
Scenario – Device Sends PME Message:
- Endpoint detects activity in D3cold state.
- Generates a PME Message TLP.
- Switch routes it upstream implicitly to the root complex.
- Root complex wakes the CPU and acknowledges via PME To Ack Message.
Endpoint → Upstream Port (Switch) → Root Complex
No completions or ack TLPs are involved — all messages are posted.
13. Hardware Implementation Notes
- Tx Path: Message generator selects Type and Message Code, then assembles header and optional payload.
- Rx Path: Message decoder routes based on Message Code and Routing Type.
- Verification: Ensure only supported messages are generated and received codes match capabilities advertised in the Device Capability registers.
14. Debug Tip
In protocol analyzers:
- Message TLPs show up with Type = 01110b or 01111b.
- Message Code identifies the specific message (e.g., PME = 0x18, ERR_FATAL = 0x12).
- Use decoding filters to isolate MSI or AER events during link debug.
NOTES
- Message TLPs replace legacy sideband signaling with in-band control packets.
- They are always posted (no completion).
- Support a wide range of functions: interrupts, power events, errors, and vendor-defined control.
- Routing depends on message type — implicit, addressed, ID-based, or broadcast.
- Essential for system-level management and firmware interaction in PCI Express.