In our previous lecture, we explored how PCI Express (PCIe) broke the speed barriers of parallel buses by shifting to a dual-simplex serial connection. To make this high-speed serial architecture highly reliable, PCIe employs a specific data transmission method known as differential signaling.
Here is a breakdown of how PCIe uses positive and negative signal pairs to overcome electrical interference and drastically improve transmission performance.
The Mechanism: Positive and Negative Signal Pairs
In a PCIe architecture, each Lane utilizes differential signaling, meaning it simultaneously sends both a positive and a negative version of the exact same signal (often referred to as D+ and D-). While this design inevitably doubles the number of physical pins and wires required for the connection, it brings distinct advantages over legacy single-ended signaling.
When the differential receiver on the other end of the Link takes in both of these signals, it subtracts the negative voltage from the positive voltage. The receiver then evaluates the resulting difference between the two to accurately determine the value of the transmitted bit.
Advantage 1: Unprecedented Noise Immunity
The most significant benefit of this subtraction method is its built-in immunity to electrical noise. In hardware layout, the paired differential signals are placed on adjacent pins, and their physical traces are routed very closely together to maintain the proper transmission line impedance.
Because the two wires travel side-by-side, any external electrical noise or interference that hits the traces will affect both the D+ and D- signals by approximately the same amount, and in the exact same direction. Because the receiver’s only job is to look at the difference between the two voltages, the noise is effectively mathematically canceled out. As a result, external noise does not impact the receiver’s ability to accurately distinguish the bits being transmitted.
Advantage 2: Reduced Signal Voltage
Alongside greatly improved noise immunity, utilizing differential signaling provides the second clear advantage of allowing the bus to operate with a reduced signal voltage compared to older single-ended designs. (Note: While the provided sources do not elaborate on the specific downstream benefits of this, in computer architecture, reducing the signal voltage is generally crucial for lowering power consumption and enabling the extremely rapid signal switching needed to achieve PCIe’s massive transfer speeds.)