I2C Protocol – Complete Guide | VLSI Trainers

What is I2C?

I2C (Inter-Integrated Circuit), pronounced I-squared-C, is a synchronous, multi-master, multi-slave, serial communication protocol. It was introduced by Philips (now NXP) in 1982.

I2C allows a processor or microcontroller to communicate with multiple peripheral devices using only two wires.

Key Characteristics – Cheat Sheet

• Wires: SDA (Data), SCL (Clock) + Ground
• Communication: Synchronous
• Architecture: Master–Slave
• Direction: Half-Duplex
• Addressing: 7-bit or 10-bit slave address
• Speed: 100 kbps to 3.4 Mbps

The Hardware Layer

SDA – Serial Data Line

Carries address, data, and ACK/NACK bits.

SCL – Serial Clock Line

Clock generated by the Master to synchronize data transfer.

Open-Drain Concept & Pull-Up Resistors

I2C pins are open-drain, meaning devices can only pull the line LOW. They cannot drive it HIGH.

• Logic 0 → Device pulls the line to GND
• Logic 1 → Device releases the line

Pull-up resistors are required to bring SDA and SCL lines HIGH when idle.

I2C Communication Flow (Transaction)

1. Idle State

SDA = HIGH, SCL = HIGH

2. START Condition

SDA transitions from HIGH → LOW while SCL remains HIGH.

3. Address Frame (8 Bits)

• 7-bit Slave Address
• 1-bit R/W flag

4. ACK / NACK (9th Clock)

• ACK: Slave pulls SDA LOW
• NACK: SDA remains HIGH

5. Data Transfer

• 8-bit data + ACK for each byte
• MSB transmitted first

6. STOP Condition

SDA transitions LOW → HIGH while SCL is HIGH.

Advanced Features

Clock Stretching

Slave holds SCL LOW to slow down the Master.

Multi-Master Support

Multiple Masters can share the bus with arbitration.

I2C Speed Modes

Advantages & Disadvantages

Typical Applications

• Sensors – MPU6050, BMP280
• Displays – OLED (SSD1306)
• RTC – DS3231
• EEPROM & Flash memory
• DACs and ADCs